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Volume 342, Issue 1 · 6 articles from 2 issues
A Guide to AI Chip Architectures
As AI workloads have grown increasingly complex, processors have specialized beyond general-purpose CPUs to include GPUs for parallel processing, ASICs for task-specific efficiency, FPGAs for reconfigurable computing, NPUs for mobile edge devices, TPUs for matrix math operations, and LPUs for language model inference.
Each architecture offers distinct tradeoffs in performance, power consumption, cost, and flexibility. Organizations must evaluate their specific AI workload type, model maturity, deployment environment, available development skills, performance metrics, and data center infrastructure when selecting processor accelerators to optimize both performance and costs.
CISO's Guide to Vector Database Security
Vector databases, which store embeddings of enterprise data to enable semantic search and AI applications, face significant security risks if improperly protected. Organizations must establish data governance, classification, and access controls before sensitive information is indexed, secure databases with encryption and authentication, and restrict application access using least-privilege principles.
CISOs should inventory existing deployments, classify data by sensitivity, apply defense-in-depth strategies including centralized logging and monitoring, and treat retrieved content as untrusted to mitigate threats like unauthorized retrieval, data poisoning, and prompt injection attacks.
Nvidia detailed its 88-core, 176-thread Vera CPU at Hot Chips 2026, claiming 14-22% faster Linux kernel compiles than AMD EPYC.
Tom's Hardware's Hot Chips 2026 coverage details Nvidia's Vera CPU, a single 88-core SKU using Arm v9.2-A Olympus cores with a novel 'spatial multithreading' approach that physically isolates pipeline components rather than time-slicing them, yielding 176 total threads.
The monolithic die feeds up to 1.5TB of LPDDR5X memory at 1.2TB/s bandwidth.
Nvidia claims Vera compiles the Linux kernel 14-22% faster than AMD's 96-core EPYC 9655P and delivers a 1.8x improvement in agentic-workload task completion versus competing x86 chips, based on internal benchmarks, as it pushes into the emerging agentic-CPU market.
Eight emerging technologies, from AI agents to post-quantum cryptography, expected to transform industries in 2026.
The article surveys eight next-generation technologies reshaping 2026: AI agents moving beyond chatbots into complex task handling, quantum computing advancing error correction toward practical breakthroughs, and humanoid robots becoming workplace-ready.
It also covers 6G research setting future connectivity standards, spatial computing expanding from gaming into education and healthcare, advanced battery technology improving electric vehicles and renewable energy, and post-quantum cryptography protecting against future quantum threats.
Each represents significant investment and development momentum.
Arm disclosed its AGI server CPU design at Hot Chips 2026: two 70-core N3P chiplets linked by a 2 TB/s UCIe fabric.
Tom's Hardware's Hot Chips 2026 coverage details Arm's AGI data-center CPU, built from two 70-core chiplets fabricated on TSMC's N3P process and connected via a 2 TB/s UCIe die-to-die fabric link.
The design includes a 12-channel memory controller aimed at feeding large-core-count workloads with sufficient bandwidth for AI and data-center applications.
The disclosure gives architects and system builders concrete details on Arm's chiplet interconnect and memory subsystem choices as it competes for a slice of the growing AI server CPU market alongside Nvidia and traditional x86 vendors.
A deep dive on Intel's delayed Diamond Rapids Xeon 7, a 256-core chiplet design aimed squarely at HPC.
Intel's Diamond Rapids Xeon 7 will ship with up to 256 performance cores, up from an original 192-core plan, after being delayed to 2027 for refinement, matching AMD's upcoming Venice Epyc core counts.
The modular design uses up to 22 chiplets: 16 core compute dies on Intel's 18A-P process, four base dies on Intel 3-T, and two fabric hub dies on Intel 3, delivering 16 DDR5 channels at 8,000 MT/s (12,800 with MRDIMMs) and 128 PCIe 6.0/CXL 3/UPI 3 lanes.
Notably, Diamond Rapids drops hyperthreading entirely and targets HPC rather than general enterprise use, with both Intel and AMD chips landing around 600W TDP, making price and value the key differentiators.
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